SOSA Aligned 8-Channel A/D & D/A 3U VPX Board
The Quartz® Model 5553 is a high-performance, SOSA-aligned 3U OpenVPX board based on the Xilinx Zynq UltraScale+ RFSoC. The RFSoC integrates eight RF class A/D and D/A converters into the Zynq’s multiprocessor architecture, creating a multichannel data conversion and processing solution on a single chip. The Model 5553 brings RFSoC performance to 3U VPX with a complete system on a board.
Complementing the RFSoC’s on-chip resources are the 5553’s sophisticated clocking section for single board and multiboard synchronization, a low-noise front end for RF input and output, 16 GBytes of DDR4, a 10 GigE interface, a 40 GigE interface, a gigabit serial optical interface capable of supporting dual 100 GigE connections and general purpose serial and parallel signal paths to the FPGA.
Expedite Development Time
The available Navigator® Design Suite includes a board support package (BSP) and a FPGA design kit (FDK) providing complete operational control of the hardware and easy configuration of new FPGA functions.
- Developed in alignment with the SOSA™ Technical Standard
- Incorporates Xilinx® Zynq® UltraScale+™ RFSoC
- 16 GB of DDR4 SDRAM
- On-board GPS receiver
- 10 GigE Interface
- 40 GigE Interface
- Optional VITA 67.3C optical interface for backplane gigabit serial communication
- Dual 100 GigE UDP interface
- Compatible with several VITA standards including: VITA 46, VITA 48, VITA 67.3C, and VITA 65 (OpenVPX™ System Specification)
- Ruggedized and conduction-cooled
- Unique QuartzXM eXpress Module enables migration to other form factors
- Navigator® BSP for software development
- Navigator® FDK for custom IP development
- Free lifetime applications support
Field Programmable Gate Array
- Type: (standard) Xilinx Zynq UltraScale+ RFSoC XCZU47DR
- Option -048: Xilinx Zynq UltraScale+ RFSoC XCZU48DR
- Speed: (standard) -1 speed grade
- Option -002: -2 speed grade
RFSoC RF Signal Chain
- A/D Converters
- Quantity: 8
- Sampling Rate: 5.0 GHz
- Resolution: 14 bits
- D/A Converters
- Quantity: 8
- Sampling Rate: 10 GHz
- Resolution: 14 bits
Sample Clock
- Source: On-board programmable clock source or external clock source
Reference Clock
- Source: On-board oscillator, on-board GPS, or exernal source
Gate/Trigger:
- Source: Programmable through software or external source
GPS
- Source: on-board
FPGA I/O
- Interface: GPIO
- Quantity: 10 Pairs
- Type: LVDS
- Location: VPX-P1
- Interface: 10 GigE
- Location: VPX-P1
- Interface: 40 GigE
- VPX-P1
- Interface: Optical
- Quantity
- Option-108: 8 full duplex lanes
- Speed: 25 Gb/sec
- Protocol: Factory-installed dual 100 GigE UDP IP cores provides greater than 24 GB/sec data transfers, other protocols supported with user installation IP
- Quantity
Memory
- Processing System
- Type: DDR4 SDRAM
- Size: 8 GB
- Programmable Logic
- Type: DDR4 SDRAM
- Size: 8 GB
- FPGA Configuration FLASH
- Type: QSPI NOR Flash
- Size: 2 x 1 Gbit
Environmental
- Option -763: L3 (conduction-cooled)
- Operating Temp: -40° to 70° C
- Storage Temp: -50° to 100° C
- Relative Humidity: 0 to 95%, non-condensing
Model | Description |
---|---|
5553 | 8-Channel A/D & D/A Zynq UltraScale+ RFSoC Gen 3 Processor - SOSA Aligned 3U VPX |
Options | Description |
---|---|
-002 | -2 FPGA speed grade, -1 standard |
-048 | XCZU48DR FPGA (XCZU47DR is standard) |
-107 | VITA 67.3D 4X optical interface |
-108 | VITA 67.3D with 4 A/D, 4 D/A, External Reference and Trigger connections installed |
-113 | VITA 67.3D with 4 A/D, 4 D/A, External Reference and Trigger connections installed |
-114 | VITA 67.3C with 8 A/D, 8 D/A, External Reference, Trigger, GPS Antenna and External Clock connections installed |
-763 | Conduction cooled, Level L3 |
Contact us for compatible option combinations and complete specifications of rugged and conduction-cooled versions.